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IRFR120, IRFU120
Data Sheet July 1999 File Number
2414.2
8.4A, 100V, 0.270 Ohm, N-Channel Power MOSFETs
These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA09594.
Features
* 8.4A, 100V * rDS(ON) = 0.270 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
Ordering Information
PART NUMBER IRFR120 IRFU120 PACKAGE TO-252AA TO-251AA BRAND IRFR120 IRFU120
Symbol
D
G
NOTE: When ordering, use the entire part number.
S
Packaging
JEDEC TO-251AA
SOURCE DRAIN GATE GATE
JEDEC TO-252AA
DRAIN (FLANGE)
DRAIN DRAIN (FLANGE)
SOURCE
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
IRFR120, IRFU120
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified IRFR120, IRFU120 100 100 8.4 5.9 34 20 50 0.33 36 -55 to 175 300 260 UNITS V V A A A V W W/oC mJ oC
oC oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Figure 14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 150oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured from the Drain Lead, 6.0mm (0.25in) from Package to Center of Die Measured from the Source Lead, 6.0mm (0.25in) from Package to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances
D LD G LS S
TEST CONDITIONS ID = 250A, VGS = 0V (Figure 10) VGS = VDS , ID = 250A VDS = Rated BVDSS , VGS = 0V VDS = 0.8 x Rated BVDSS , VGS = 0V, TJ = 150oC VDS > ID(ON) x rDS(ON)MAX , VGS = 10V VGS = 20V ID = 5.9A, VGS = 10V (Figures 8, 9) VDS 50V, ID = 5.9A (Figure 12) VDD = 50V, ID 8.4A, RGS = 18, RL = 5.1 MOSFET Switching Times are Essentially Independent of Operating Temperature
MIN 100 2.0 8.4 2.8 -
TYP 0.25 4.2 8.8 30 19 20 9.7 2.2 2.3 350 130 24 4.5
MAX 4.0 25 250 500 0.27 13 45 29 30 15 3.3 3.4 -
UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance
VGS = 10V, ID = 8.4A, VDS = 0.8 x Rated BVDSS , IG(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature
-
VDS = 25V, VGS = 0V, f = 1MHz (Figure 11)
-
Internal Source Inductance
LS
-
7.5
-
nH
Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient
RJC RJA Typical Solder Mount
-
-
3.0 110
oC/W oC/W
4-378
IRFR120, IRFU120
Source to Drain Diode Specifications
PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier
G D
MIN -
TYP -
MAX 8.4 34
UNITS A A
S
Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES:
VSD trr QRR
TJ = 25oC, ISD = 8.4A, VGS = 0V (Figure 13) TJ = 25oC, ISD = 8.4A, dISD/dt = 100A/s TJ = 25oC, ISD = 8.4A, dISD/dt = 100A/s
55 0.25
110 0.53
2.5 240 1.1
V ns C
2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 770H, RG = 25, Peak IAS = 8.4A.
Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25
Unless Otherwise Specified
10
ID, DRAIN CURRENT (A)
8
6
4
2
0 125 50 75 100 TC , CASE TEMPERATURE (oC) 150 175 25 50 75 100 125 150 175 TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
10
ZJC, THERMAL IMPEDANCE
0.5 1 0.2 0.1 0.05 0.1 0.02 0.01 SINGLE PULSE PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 0.1 10-3 10-2 t1 , RECTANGULAR PULSE DURATION (s) 1 10
10-2 10-5
10-4
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
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IRFR120, IRFU120 Typical Performance Curves
100 10s ID, DRAIN CURRENT (A) 100s 10 1ms 10ms ID, DRAIN CURRENT (A)
Unless Otherwise Specified (Continued)
15
VGS = 10V VGS = 8V
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 7V
12
9 VGS = 6V 6 VGS = 5V VGS = 4V 0
1
OPERATION IN THIS AREA IS LIMITED BY rDS(ON) TJ = MAX RATED TC = 25oC SINGLE PULSE
DC
3
0.1
1
10 100 VDS , DRAIN TO SOURCE VOLTAGE (V)
1000
0
10
20
30
40
50
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
15 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) 12
IDS(ON), ON STATE DRAIN CURRENT (A)
VGS = 10V VGS = 8.0V VGS = 7.0V
100
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V
10
9 VGS = 6.0V 6 VGS = 5.0V VGS = 4.0V 0 0 1 2 3 4 5
1
TJ = 175oC
TJ = 25oC
3
0.1 0 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
2.5 rDS(ON) , ON-STATE RESISTANCE (S)
NORMALIZED DRAIN TO SOURCE ON RESISTANCE
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
3.0
2.0 VGS = 10V 1.5
2.4
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 5.9A
1.8
1.0 VGS = 20V 0.5
1.2
0.6
0
0 0 8 16 24 ID , DRAIN CURRENT (A) 32 40
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
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IRFR120, IRFU120 Typical Performance Curves
1.25 ID = 250A NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.15
Unless Otherwise Specified (Continued)
1000 VGS = 0V, f = 1MHz CISS = CGS + CGD 800 CRSS = CGD COSS CDS + CGD 600
1.05
0.95
C, CAPACITANCE (pF)
400
CISS COSS CRSS
0.85
200
0.75
-40
0
40
80
120
160
0
TJ , JUNCTION TEMPERATURE (oC)
1
2
5 10 2 5 VDS , DRAIN TO SOURCE VOLTAGE (V)
100
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
5 gfs, TRANSCONDUCTANCE (S)
4
TJ = 25oC
ISD, SOURCE TO DRAIN CURRENT (A)
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V
100 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
10
3 TJ = 175oC 2
1
TJ = 175oC
TJ = 25oC
1
0
0
3
6 9 ID , DRAIN CURRENT (A)
12
15
0.1
0
0.4 0.8 1.2 1.6 VSD , SOURCE TO DRAIN VOLTAGE (V)
2.0
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 8.4A
VGS, GATE TO SOURCE (V)
16 VDS = 80V VDS = 50V VDS = 20V
12
8
4
0
0
3
6
9
12
15
Qg, GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-381
IRFR120, IRFU120 Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD
+
-
0V
IAS 0.01
0 tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr RL VDS 90%
tOFF td(OFF) tf 90%
+
RG DUT
-
VDD
0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS
12V BATTERY
0.2F
50k 0.3F
G
DUT
0
IG(REF) 0 IG CURRENT SAMPLING RESISTOR
S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
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IRFR120, IRFU120
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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